The present invention relates to reciprocal number arithmetic operating method and circuit which are used in an amplitude normalizing circuit of a modem or the like and, more particularly, to reciprocal number arithmetic operating method and circuit for calculating a reciprocal number of an amplitude of an input vector signal.
In recent years, miniaturization of size and reduction of a price of a modem have been advanced in association with popularization of data communication using a telephone line. Therefore, the miniaturization and simplification of the circuit in the modem are necessary.
FIG. 1 shows a conventional reciprocal number arithmetic operating circuit which is used in a modem. The conventional reciprocal number arithmetic operating circuit comprises: an overflow preventing circuit 200, a power operating circuit 202; a multiplying circuit 204, a tap value generating circuit 206, a differential circuit 208, a limiter circuit 214, a loop gain adjusting circuit 210, and an updating circuit 212.
The operation of the conventional reciprocal number arithmetic operating circuit will now be described. First, to prevent a signal overflow by an arithmetic operation, by multiplying a constant (A) to an input vector signal (X+jY), an input signal (X+jY).multidot.A whose level was reduced is obtained in the overflow preventing circuit 200. Subsequently, the square of a real component and an imaginary component is obtained by each of multiplying circuits 228 and 230 in the power operating circuit 202, and those squares are added by an adder 232, thereby obtaining a power value (X.sup.2 +Y.sup.2).multidot.A.sup.2.
On the other hand, a predetermined initial value has been set as a tap value (K) into the tap value generating circuit 206. The result which is obtained by updating the tap value (K) indicates a reciprocal number of an amplitude value of an input vector signal which is finally obtained. An output signal from the power operating circuit 202 is multiplied by the tap value (K) obtained through the limiter circuit 214 by the multiplying circuit 204 and the resultant value is supplied to the differential circuit 208. A predetermined reference (Ref) has been preset into the differential circuit 208. An error signal (.DELTA.K) is obtained as follows by an adder 238. EQU .DELTA.K=Ref-K.multidot.(X.sup.2 +Y.sup.2).multidot.A.sup.2
The error signal (.DELTA.K) obtained by the differential circuit 208 is multiplied with a constant (B) for setting a loop gain to 1.0 or less by the loop gain adjusting circuit 210. After that, the resultant value is supplied to the updating circuit 212 and is added to the tap value (K), thereby updating as follows: EQU K=K+.DELTA.K
In this instance, in order to set the value (.DELTA.K) which is obtained by the differential circuit 208 to 0, a loop process in which processes by the multiplying circuit 204, differential circuit 208, loop gain adjusting circuit 210, and updating circuit 212 are repeated several times is executed. The tap value (K) which is obtained when the error signal is converged to a presumed value is generated as a reciprocal number value of the amplitude of the input vector signal (X+jY).
On the other hand, the reciprocal number value of the amplitude of the input vector signal (X+jY) which is obtained by the reciprocal number arithmetic operating circuit should be inherently equal to 1/.sqroot.(X.sup.2 +Y.sup.2). However, in the conventional reciprocal number arithmetic operating circuit shown in FIG. 1, since the tap value (K) of the reciprocal number value to be obtained is multiplied only once, the reciprocal number value is equal to 1/(X.sup.2 +Y.sup.2). Therefore, when the user tries to obtain the accurate reciprocal number value, the processing time and arithmetic operation amount increase.
A graph 200 in FIG. 4 shows the number of loop times until the error is converged to a specified error in the conventional reciprocal number arithmetic operating circuit. In order to set the error signal (.DELTA.K) of the obtained reciprocal number value to, for example, 0.01 dB or less, the loop process by the multiplying circuit 204, differential circuit 208, loop gain adjusting circuit 210, and updating circuit 212 must be repeated 24 times, so that both the converging time and the operation amount increase.